- 2014 - 2019：英国约克大学（University of York），计算机科学（博士）

- 2013 - 2014：英国约克大学（University of York），电子信息工程（硕士）

- 2009 - 2013：南京工业大学，电子信息工程（学士）

- 2009 - 2013：南京工业大学，法学（学士）

- 2020.12 - 2023.9：剑桥大学（University of Cambridge），计算机学院，Research Fellow

- 2020.6 - 2023.1：ARM，中央科技部门，高级设计师

- 2018.10 - 2020.6：瑞萨电子（Renesas Electronics），欧洲研发中心，主任工程师

- 计算机科学基础I/II（Fundamentals of Computer Science），春季

计算机体系结构、智能硬件设计自动化、安全关键处理器设计、轻量化大语言模型加速器（NPU、DNN 加速器）设计、实时系统、系统安全保障

国家自然科学基金委员会，自然科学基金面上项目，2025，主持。

国家科学技术部，重点研发计划（青年科学家项目），2025，主持。

国家自然科学基金委员会，自然科学基金优秀青年科学基金（海外），2022，主持。

江苏省科技厅，科技重大专项,2024，课题主持。

江苏省科技厅，基础研究计划重点项目,2024，课题主持。

落地成果

- ARM Genesis芯片（3 纳米），应用于谷歌数据中心

- ARM Bravo 芯片（3纳米），应用于字节跳动数据中心

- ARM Cortex-R52+ processor 处理器，应用于27款汽车芯片

- R-CAR/S4（16纳米），应用于丰田公司自动驾驶系统

- RH850/E2（28 纳米），应用于Mahindra Racing赛车的动力总成系统

- RH850/E2（28纳米），应用于博世ECU

会议论文 (近五年)

全部论文请见谷歌学术https://scholar.google.com/citations?hl=zh-CN&user=V5e-7hcAAAAJ

• Yuchen Hu, Jialin Sun, Yushu Du, Renshuang Jiang, Ning Wang, Weiwei Shan, Xinwei Fang, Xi Wang, Nan Guan, and Zhe Jiang. Beyond Fuzzer Islands: CPU Fuzzing via Smart Coordination. Design Automation Conference (DAC), 2026. （Accepted, to appear）

•  Jialin Sun, Yuchen Hu, Dean You, Hui Wang, Yushu Du, Xinwei Fang, and Zhe Jiang. Prelude: Priming-Guided State Reconstruction for Efficient FPGA CPU Debugging. Design Automation Conference (DAC), 2026. （Accepted, to appear）

•  Jiapeng Guan, Jie Zhang, Hao Zhou, Ran Wei, Dean You, Hui Wang, Yingquan Wang, Tinglue Wang, Xudong Zhao, Jing Li, and Zhe Jiang. Strix: Re-thinking NPU Reliability from a System Perspective. Design Automation Conference (DAC), 2026. （Accepted, to appear）

•  Jie Zhang, Jiapeng Guan, Hao Zhou, Xiaomeng Han, Tinglue Wang, Ran Wei, and Zhe Jiang. From Characterization to Microarchitecture: Designing an Elegant and Reliable BFP-Based NPU. Design Automation Conference (DAC), 2026. （Accepted, to appear）

•  Junhao Ye, Dingrong Pan, Hanyuan Liu, Yuchen Hu, Jie Zhou, Ke Xu, Xinwei Fang, Xi Wang, Nan Guan, and Zhe Jiang. UVMarvel: An Automated LLM-aided UVM Machine for Subsystem-level RTL Verification. Design Automation Conference (DAC), 2026. （Accepted, to appear）

•  Renshuang Jiang, Yichong Wang, Pan Dong, Xiaoxiang Fang, Zhenling Duan, Tinglue Wang, Yuchen Hu, Jie Yu, and Zhe Jiang. AkiraRust: Re-thinking LLM-aided Rust Repair Using a Feedback-guided Thinking Switch. Design Automation Conference (DAC), 2026. （Accepted, to appear）

•  Ning Wang, Zichong Deng, Bingkun Yao, Jie Zhou, Yuchen Hu, Xi Wang, Zhe Jiang, and Nan Guan. CircuitDiff: Bridging Netlist Knowledge with RTL Based on Graph Denoising Diffusion. Design Automation Conference (DAC), 2026. （Accepted, to appear）

•  Ning Wang, Bingkun Yao, Jie Zhou, Yuchen Hu, Xi Wang, Zhe Jiang, and Nan Guan. Insights from Verification: Training a Verilog Generation LLM Using Reinforcement Learning with Testbench Feedback. Design Automation Conference (DAC), 2026. （Accepted, to appear）

•  Jia Xiong, Runkai Li, Haowen Fang, Cheng Ni, Ziran Zhu, Nan Guan, Zhe Jiang, and Xi Wang. ParetoPilot: Global Optimization Reasoning on HLS Design Space Exploration with LLMs. Design Automation Conference (DAC), 2026. （Accepted, to appear）

•  Jianmin Ye, Yifan Zhang, Tianyang Liu, Qi Tian, Shengchu Su, Lik Tung Fu, Nan Guan, Zhe Jiang, and Xi Wang. ChipModeler: LLM-Aided Reference Model Design for Agile Hardware Verification. Design Automation Conference (DAC), 2026. （Accepted, to appear）

•  Changwen Xing, SamZaak Wong, Xinlai Wan, Yanfeng Lu, Mengli Zhang, Zebin Ma, Lei Qi, Zhengxiong Li, Nan Guan, Zhe Jiang, Xi Wang, and Jun Yang. ChipMind: Retrieval-Augmented Reasoning for Long-Context Circuit Design Specifications. AAAI Conference on Artificial Intelligence (AAAI), 2026. （Accepted, to appear）

•  Gwok-Waa Wan, SamZaak Wong, Shengchu Su, Chenxu Niu, Ning Wang, Xinlai Wan, Qixiang Chen, Mengnv Xing, Jingyi Zhang, Jianmin Ye, Yubo Wang, Rongchang Song, Tao Ni, Qiang Xu, Nan Guan, Zhe Jiang, Xi Wang, and Jun Yang. Towards End-to-End Benchmarking of LLM-Aided Design Verification. AAAI Conference on Artificial Intelligence (AAAI), 2026. （Accepted, to appear）

•  Jinwu Chen, Yuhui Shi, He Wang, Zhe Jiang, Jun Yang, Xin Si, and Zhenhua Zhu. CIM-Tuner: Balancing the Compute and Storage Capacity of SRAM-CIM Accelerator via Hardware-Mapping Co-exploration. Design, Automation and Test in Europe (DATE), 2026. （Accepted, to appear）

•  Gwok-Waa Wan, Mengnv Xing, Shengchu Su, Jingyi Zhang, Sam-Zaak Wong, Xi Wang, Zhe Jiang, and Jun Yang. ChatTest: Automated Test Generation for Agile Hardware Verification with LLMs. Design, Automation and Test in Europe (DATE), 2026. （Accepted, to appear）

•  Shuai Zhao, Yiyang Gao, Zhiyang Lin, Boyang Li, Xinwei Fang, Zhe Jiang, and Nan Guan. Response Time Analysis for Probabilistic DAG Tasks in Multicore Real-Time Systems. Real-Time Systems Symposium (RTSS), 2025. （Accepted, to appear）

•  Xiangfeng Liu, Zhe Jiang, Anzhen Zhu, Xiaomeng Han, Mingsong Lyu, Qingxu Deng, and Nan Guan. Re-thinking Memory-Bound Limitations in CGRAs. International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), 2025. （Best Paper Award）

•  Dean You, Jieyu Jiang, Xiaoxuan Wang, Yushu Du, Zhihang Tan, Wenbo Xu, Hui Wang, Jiapeng Guan, Wang Zhenyuan, Shuai Zhao, Ran Wei, and Zhe Jiang. MERE: Hardware-Software Co-Design for Masking Cache Miss Latency in Embedded Processors. International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), 2025.

•  Junhao Ye, Yuchen Hu, Ke Xu, Dingrong Pan, Qichun Chen, Jie Zhou, Shuai Zhao, Xinwei Fang, Xi Wang, Nan Guan, and Zhe Jiang. From Concept to Practice: An Automated LLM-aided UVM Machine for RTL Verification. International Conference on Computer-Aided Design (ICCAD), 2025.

• Zhe Jiang, Minli Liao, Sam Ainsworth, Dean You, and Timothy Jones. MEEK: Re-thinking Heterogeneous Parallel Error Detection Architecture for Real-World OoO Superscalar Processors. Design Automation Conference (DAC), 2025.

• Zhe Jiang, Sam Ainsworth, and Timothy Jones. FireGuard: A Generalized Microarchitecture for Fine-Grained Security Analysis on OoO Superscalar Cores. Design Automation Conference (DAC), 2025.

•  Tinglue Wang, Yiming Li, Wei Tang, Jiapeng Guan, Zhenghui Guo, Renshuang Jiang, Ran Wei, Jing Li, and Zhe Jiang. FlexStep: Enabling Flexible Error Detection in Multi/Many-core Real-time Systems. Design Automation Conference (DAC), 2025.

•  Hui Wang, Zhengpeng Zhao, Jing Wang, Yushu Du, Yuan Cheng, Bing Guo, He Xiao, Chenhao Ma, Xiaomeng Han, Dean You, Jiapeng Guan, Ran Wei, Dawei Yang, and Zhe Jiang. NVR: Vector Runahead on NPUs for Sparse Memory Access. Design Automation Conference (DAC), 2025.

•  Xiaomeng Han, Yuan Cheng, Jing Wang, Junyang Lu, Hui Wang, Xuanxi Zhang, Ning Xu, Dawei Yang, and Zhe Jiang. BBAL: A Bidirectional Block Floating Point-Based Quantization Accelerator for Large Language Models. Design Automation Conference (DAC), 2025.

•  Yuchen Hu, Junhao Ye, Ke Xu, Jialin Sun, Shiyue Zhang, Xinyao Jiao, Dingrong Pan, Jie Zhou, Ning Wang, Weiwei Shan, Xinwei Fang, Xi Wang, Nan Guan, and Zhe Jiang. UVLLM: An Automated Universal RTL Verification Framework Using LLMs. Design Automation Conference (DAC), 2025.

•  Jie Zhou, Youshu Ji, Ning Wang, Yuchen Hu, Xinyao Jiao, Bingkun Yao, Xinwei Fang, Nan Guan, Shuai Zhao, and Zhe Jiang. Insights from Rights and Wrongs: A Large Language Model for Solving Assertion Failures in RTL Design. Design Automation Conference (DAC), 2025.

•  Renshuang Jiang, Pan Dong, Zhenling Duan, Yu Shi, Xiaoxiang Fang, Yan Ding, Jun Ma, Shuai Zhao, and Zhe Jiang. Unlocking a New Rust Programming Experience: Fast and Slow Thinking with LLMs to Conquer Undefined Behaviors. Design Automation Conference (DAC), 2025.

•  Juxin Niu, Xiangfeng Liu, Dan Niu, Xi Wang, Zhe Jiang, and Nan Guan. ReChisel: Effective Automatic Chisel Code Generation by LLM with Reflection. Design Automation Conference (DAC), 2025.

•  Bingkun Yao, Ning Wang, Jie Zhou, Xi Wang, Hong Gao, Zhe Jiang, and Nan Guan. Location Is Key: Leveraging LLM for Functional Bug Localization in Verilog Design. Design Automation Conference (DAC), 2025.

•  Bingkun Yao, Mun Choon Chan, Hong Gao, Zhe Jiang, and Nan Guan. Age-of-Information Minimization for Data Aggregation in Energy-Harvesting IoTs. Design Automation Conference (DAC), 2025.

•  Ning Wang, Bingkun Yao, Jie Zhou, Yuchen Hu, Xi Wang, Zhe Jiang, and Nan Guan. Large Language Model for Verilog Generation with Code-Structure-Guided Reinforcement Learning. International Conference on LLM-Aided Design (ICLAD), 2025.

•  Ning Wang, Bingkun Yao, Jie Zhou, Yuchen Hu, Xi Wang, Zhe Jiang, and Nan Guan. VeriDebug: A Unified LLM for Verilog Debugging via Contrastive Embedding and Guided Correction. International Conference on LLM-Aided Design (ICLAD), 2025.

•  Xing Hu, Yuan Cheng, Dawei Yang, Zukang Xu, Zhihang Yuan, Jiangyong Yu, Chen Xu, Zhe Jiang, and Sifan Zhou. OstQuant: Refining Large Language Model Quantization with Orthogonal and Scaling Transformations for Better Distribution Fitting. International Conference on Learning Representations (ICLR), 2025.

•  Hui Wang, Yuan Cheng, Xiaomeng Han, Zhengpeng Zhao, Dawei Yang, and Zhe Jiang. Pushing the Limits of BFP on Narrow Precision LLM Inference. AAAI Conference on Artificial Intelligence (AAAI), 2025.

• Zhe Jiang, Shuai Zhao, Ran Wei, Yiyang Gao, and Jing Li. A Cache/Algorithm Co-design for Parallel Real-Time Systems with Data Dependency on Multi/Many-core System-on-Chips. Design Automation Conference (DAC), 2024.

• Zhe Jiang, Shuai Zhao, Ran Wei, Gang Chen, Xin Si, and Nan Guan. ROTA-I/O: Hardware/Algorithm Co-design for Real-Time I/O Control with Improved Timing Accuracy and Robustness. Real-Time Systems Symposium (RTSS), 2024.

•  Jiapeng Guan, Ran Wei, Dean You, Yingquan Wang, Ruizhe Yang, Hui Wang, and Zhe Jiang. MESC: Re-thinking Algorithmic Priority/Criticality Inversion for Heterogeneous MCSs. Real-Time Systems Symposium (RTSS), 2024.

•  Xiaoxiang Fang, Pan Dong, Jun Luo, Leilei Li, Yan Ding, and Zhe Jiang. Optimization of NUMA-Aware DNN Computing System. International Conference on Intelligent Computing (ICIC), 2024.

•  Ke Xu, Jialin Sun, Yuchen Hu, Xinwei Fang, Weiwei Shan, Xi Wang, and Zhe Jiang. MEIC: Re-thinking RTL Debug Automation Using LLMs. International Conference on Computer-Aided Design (ICCAD), 2024.

• Zhe Jiang, Nathan Fisher, Nan Guan, and Zheng Dong. BlueFace: Integrating an Accelerator into the Core's Pipeline through Algorithm-Interface Co-Design for Real-Time SoCs. Design Automation Conference (DAC), 2023.

•  Ran Wei, Zhe Jiang, Xiaoran Guo, Haitao Mei, Athanasios Zolotas, and Tim Kelly. Designing Critical Systems with Iterative Automated Safety Analysis. Design Automation Conference (DAC), 2022.

• Zhe Jiang, Kecheng Yang, Neil Audsley, Nathan Fisher, Weisong Shi, and Zheng Dong. BlueScale: Scalable Memory Architecture for Real-Time Computing on Highly Integrated SoCs. Design Automation Conference (DAC), 2022.

• Zhe Jiang, Kecheng Yang, Yunfeng Ma, Nathan Fisher, Neil Audsley, and Zheng Dong. I/O-GUARD: Hardware/Software Co-Design for Virtualization with Guaranteed Real-time Performance. Design Automation Conference (DAC), 2021.

• Zhe Jiang, Xiaotian Dai, and Neil Audsley. HIART-MCS: High Resilience and Approximated Computing Architecture for Imprecise MCS. Real-Time Systems Symposium (RTSS), 2021.

•  Yankai Wang, Dawei Yang, Wei Zhang, Zhe Jiang, and Wenqiang Zhang. Adaptable Ensemble Distillation. IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2021.

•  Shuai Zhao, Zhe Jiang, Xiaotian Dai, Iain Bate, Ibrahim Habli, and Wanli Chang. Timing-Accurate General-Purpose I/O for Multi- and Many-core Systems: Scheduling and Hardware Support. Design Automation Conference (DAC), 2020.

• Zhe Jiang, Kecheng Yang, Nathan Fisher, Neil Audsley, and Zheng Dong. Pythia-MCS: Enabling Quarter-Clairvoyance in Mixed-Criticality Systems. Real-Time Systems Symposium (RTSS), 2020.

• Zhe Jiang, Shuai Zhao, Pan Dong, Dawei Yang, Ran Wei, Nan Guan, and Neil Audsley. Re-Thinking Mixed-Criticality Architecture for Automotive Industry. International Conference on Computer Design (ICCD), 2020.

•  Dawei Yang, Xinlei Li, Xiaotian Dai, Rui Zhang, Lizhe Qi, Wenqiang Zhang, and Zhe Jiang. All in One Network for Driver Attention Monitoring. IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2020.

  
  

期刊论文(近五年)

• Zhe Jiang, Xiaoxuan Wang, Zhenghui Guo, Renshuang Jiang, Pan Dong, Shuai Zhao, and Nan Guan. MCS3: A Mixed-Criticality System with Suspension-awareness and Semi-clairvoyance for Edge Computing. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2026. （Accepted, to appear）

• Dawei Yang, Chenhao Ma, Xiuhui Deng, Jianning Zhang, Huang Wei, Zhe Jiang, and Ying Huo. Joint Learning Video Segmentation with Different Prior Guidance. Journal of System Architecture (JSA), 2026. （Accepted, to appear）

•  Qingqiang He, Nan Guan, Zhe Jiang, and Mingsong Lv. Multi-Path Bound for Parallel Tasks With Conditional Branches. IEEE Transactions on Computers (TC), 2025.

•  Renshuang Jiang, Pan Dong, Yan Ding, Ran Wei, and Zhe Jiang. Thetis-Lathe: Guidance on Reducing Residual Safety Obstacle in System Software From Rust Source Codes. ACM Transactions on Embedded Computing Systems (TECS), 2025.

•  Jing Wang, Xingke Zheng, Jiaqi Gao, Yue Luo, and Zhe Jiang. Brightness Control of Mn4+-Doped Ca2LaTaO6 Double Perovskite Red Emitters in a Noncontact Circuit System. ChemistrySelect (CS), 2025.

•  Ran Wei, Chongsheng Fan, Shijun Liu, Rong Zhou, Zekun Wu, Haochi Wang, Yifan Cai, and Zhe Jiang. Towards an Extensible Model-Based Digital Twin Framework for Space Launch Vehicles. Journal of Industrial Information Integration (JIII), 2024.

• Zhe Jiang, Kecheng Yang, Nathan Fisher, Nan Guan, Neil Audsley, and Zheng Dong. Hopscotch: A Hardware-Software Co-Design for Efficient Cache Resizing on Multi-Core SoCs. IEEE Transactions on Parallel and Distributed Systems (TPDS), 2024.

•  Dawei Yang, Ning He, Xing Hu, Zhihang Yuan, Jiangyong Yu, Chen Xu, and Zhe Jiang. Post-training Quantization for Re-parameterization via Coarse & Fine Weight Splitting. Journal of System Architecture (JSA), 2024.

•  Dawei Yang, Yan Wang, Ran Wei, Jiapeng Guan, Xiaohua Huang, Wei Cai, and Zhe Jiang. An Efficient Multi-task Learning CNN for Driver Attention Monitoring. Journal of System Architecture (JSA), 2024.

•  Qingqiang He, Nan Guan, Zhe Jiang, and Mingsong Lv. On the Degree of Parallelism for Parallel Real-Time Tasks. Journal of System Architecture (JSA), 2024.

• Zhe Jiang, Xiaotian Dai, Alan Burns, Neil Audsley, Zonghua Gu, and Ian Gray. A High-Resilience Imprecise Computing Architecture for Mixed-Criticality Systems. IEEE Transactions on Computers (TC), 2023.

• Zhe Jiang, Kecheng Yang, Neil Audsley, Nathan Fisher, Ian Gray, and Zheng Dong. AXI-ICRT: Towards a Real-Time AXI-Interconnect for Highly Integrated SoCs. IEEE Transactions on Computers (TC), 2023.

• Zhe Jiang, Xiaotian Dai, Ran Wei, Ian Gray, Zonghua Gu, Qingling Zhao, and Shuai Zhao. NPRC-I/O: A NoC-Based Real-Time I/O System With Reduced Contention and Enhanced Predictability. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2023.

•  Ran Wei, Zhe Jiang, Haitao Mei, Konstantinos Barmpis, Simon Foster, Tim Kelly, and Yan Zhuang. Automated Model Based Assurance Case Management Using Constrained Natural Language. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2023.

•  Ran Wei, Zhe Jiang, Xiaoran Guo, Ruizhe Yang, Haitao Mei, Athanasios Zolotas, and Tim Kelly. DECISIVE: Designing Critical Systems With Iterative Automated Safety Analysis. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2023.

•  Renshuang Jiang, Pan Dong, Yan Ding, Ran Wei, and Zhe Jiang. Thetis: A Booster for Building Safer Systems Using the Rust Programming Language. Applied Sciences (AP), 2023.

• Zhe Jiang, Ran Wei, Pan Dong, Yan Zhuang, Neil Audsley, and Ian Gray. Towards Time-Predictable Hardware Hypervisor for Many-core Embedded Systems. IEEE Transactions on Computers (TC), 2022.

• Zhe Jiang, Kecheng Yang, Yunfeng Ma, Nathan Fisher, and Zheng Dong. Towards Hard Real-Time and Energy-Efficient Virtualization for Many-core Embedded Systems. IEEE Transactions on Computers (TC), 2022.

• Zhe Jiang, Kecheng Yang, Neil Audsley, Nathan Fisher, and Zheng Dong. Towards an Energy-Efficient Quarter-Clairvoyant Mixed-Criticality System. Journal of System Architecture (JSA), 2022.

•  Qingling Zhao, Mengfei Qu, Bo Huang, Zhe Jiang, and Haibo Zeng. Schedulability Analysis and Stack Size Minimization for Adaptive Mixed-Criticality Scheduling with Clairvoyance. Journal of System Architecture (JSA), 2022.

• Zhe Jiang, Shuai Zhao, Ran Wei, Dawei Yang, Richard Paterson, Nan Guan, and Yan Zhuang. Bridging the Pragmatic Gaps for Mixed-Criticality Systems in Automotive Industry. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2021.

• Zhe Jiang, Xiaotian Dai, Pan Dong, Ran Wei, Dawei Yang, Neil Audsley, and Nan Guan. Towards an Analysable, Scalable, Energy-Efficient Virtualization for Mixed-Criticality Systems. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2021.

• Zhe Jiang, Ran Wei, Pan Dong, Qingling Zhao, Dizhong Zhu, Yankai Wang, Neil Audsley, and Yan Zhuang. PSpSys: Exploring Real-time Hybrid-Criticality System on ARM TrustZone Technology. Journal of System Architecture (JSA), 2021.

•  Pan Dong, Zhe Jiang, Alan Burns, Yan Ding, and Jun Ma. Build Real-Time Communication for Hybrid Dual-OS System. Journal of System Architecture (JSA), 2020.

全部论文请见谷歌学术https://scholar.google.com/citations?hl=zh-CN&user=V5e-7hcAAAAJ

2023 年至今，担任 IEEE Real-Time Systems Symposium（RTSS，CCF A 类）程序委员会TPC成员。

2024 年至今，担任 AAAI Conference on Artificial Intelligence（AAAI，CCF A 类）程序委员会TPC成员。

2023 年至今，担任 Design, Automation and Test in Europe（DATE，CCF B 类）程序委员会TPC成员。

2023 年至今，担任 IEEE Real-Time and Embedded Technology and Applications Symposium（RTAS，CCF B 类）程序委员会TPC成员。

- CODES+ISSS 最佳论文，2025

- 华为紫金学者，2024

- 小米青年学者，2024

- ACM SIGBED Rising Star（新星奖，中国），2023

- 国家自然科学基金优秀青年科学基金项目（海外），2022

- 剑桥大学丘吉尔学院卓越研究者，2022

    我们是一支年轻而专注的计算机体系结构与系统研究团队，长期围绕新型计算系统的体系结构、微架构与设计自动化开展研究，重点关注安全关键乱序处理器、轻量化大语言模型加速器以及大语言模型辅助硬件开发等方向。我们希望面向高性能、高可靠、高安全和高部署效率等关键需求，探索下一代处理器与芯片系统的设计方法，为我国集成电路与智能计算领域的发展贡献扎实而有价值的研究成果。

    我们相信，好的研究不仅来自前沿问题本身，更来自持续投入、严谨思考和踏实合作。团队鼓励成员在真实问题中学习，在系统实践中成长，在不断打磨中形成自己的研究判断与技术能力。无论你更希望深入学术前沿，还是希望面向工程落地开展研究；无论你对处理器设计、AI芯片、系统安全，还是智能化硬件开发感兴趣，只要你具备明确的目标、持续学习的热情和认真负责的态度，我们都真诚欢迎你的加入。

    在这里，你将有机会接触计算机体系结构与芯片设计领域的重要问题，参与处理器微体系结构优化、可靠性与安全机制设计、大模型推理加速、软硬件协同设计以及智能辅助硬件开发等研究工作。我们期待与你一起，围绕有挑战的问题开展扎实研究，积累真正过硬的能力，并在合作中共同探索、共同成长。

    团队目前正处于快速发展阶段。如果你对我们的研究方向感兴趣，或希望进一步了解团队情况，欢迎投递简历或通过邮件联系我们：101013615@seu.edu.cn或zhejiang.arch@gmail.com

课题组常年招收硕士生博士生，欢迎对以下方向具有浓厚兴趣的员工联系，组内经费充足，资源丰富！另外，如想在本科期间进组历练的同学也可与我联系！（101013615@seu.edu.cn或zhejiang.arch@gmail.com）

-安全关键乱序处理器（OoO Processor）微架构设计：从事面向安全关键场景的乱序处理器体系结构与微体系结构研究，聚焦高性能处理器在功能安全、时序安全、可靠性与信息安全等方面的关键问题，探索兼顾性能与安全保障的新型处理器设计方法。围绕乱序执行、存储层次、错误检测与恢复、资源隔离与保护等核心问题，开展体系结构建模、机制设计与优化研究，为自动驾驶、航空航天、工业控制等安全关键系统提供高可信计算基础。
基础知识：计算机体系结构、数字电路等；具备一定的编程能力与英语能力；对处理器设计、软硬件协同优化有兴趣者优先。

-轻量化大语言模型（LLM）加速器微架构设计：从事面向大语言模型部署的轻量化专用加速器研究，关注大模型推理与边缘部署过程中的性能、能效、可靠性与部署效率问题，探索适用于资源受限平台的新型加速架构与设计方法。围绕算子加速、存储访问优化、并行执行机制、量化与压缩支持、可靠性保护等方向，开展面向大模型推理场景的体系结构创新与实现研究，为大模型在端侧设备、智能终端及嵌入式平台上的高效落地提供技术支撑。
基础知识：计算机体系结构、数字电路、机器学习基础等；具备一定的编程能力与英语能力；熟悉深度学习基础或对AI芯片设计有兴趣者优先。

-大语言模型辅助的硬件设计自动化（LLM-aided Hardware Development）：从事大语言模型与硬件设计自动化交叉方向的研究，致力于探索利用大语言模型提升硬件开发效率、设计质量与验证能力的新方法。面向处理器、加速器及片上系统的设计流程，围绕硬件代码生成、设计空间探索、自动验证、错误分析与修复、设计文档理解与辅助开发等问题开展研究，推动人工智能技术在硬件开发全流程中的应用落地，为新型智能化EDA与高效硬件研发提供支撑。
基础知识：计算机体系结构、数字电路、硬件描述语言基础、英语能力；熟悉 Python、C/C++、Verilog/VHDL 或对智能化硬件开发感兴趣者优先。